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Notes on Endianness for SIMPC
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Endianness is often referred to as 'byte order'.

Big Endian (BE) - Most significant byte first.  eg.  0x12345678 comprises byte[0]=0x12, byte[1]=0x34, byte[2]=0x56, byte[3]=0x78

Little Endian (LE) - Least significant byte first.  eg.  0x12345678 comprises byte[0]=0x78, byte[1]=0x56, byte[2]=0x34, byte[3]=0x12

Network byte ordering is BE.
The MPC831X PPC processor is a BE processor (except for PCI registers).
The TIC6XXXTMSC67XX DSP is a LE processor.

FPGA - The FPGA is designed to accommodate LE or BE data.  The FPGA is mapped to address 0xFF000000 on the MPC local bus.  Offset range 0x0 - 0x100000 is the BE region.  Offset range 0x0 + 0x100000 - 0x100000 + 0x100000 is the LE region.

Careful consideration must be given to endianness.  Below are several examples.
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Example 1
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Agent Mode Operation

Inside of a LE host computer byte swapping must occur due to the endianness of the MPC processor.  For the FPGA this is achieved by accessing the LE region of the FPGA.  This is set up automatically for you during initialization.  For the IMMR and any other region byte swapping must be done manually.

LE data:  byte[3] byte[2] byte[1] byte[0]
	     |       |       |       |
BE data:  byte[0] byte[1] byte[2] byte[3]

Writing 0X89ABCDEF to an IMMR register would first be swapped 0xEFCDAB89.  When the data is passed from the LE host to the BE MPC the data gets swapped back to its original orientation 0x89ABCDEF.

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Example 2a
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Stand Alone Operation - sisample (via a virtual terminal eg. minicom, hyperterminal, telnet, etc.)

During stand alone operation sisample is being run on the MPC processor.  Any application running on the MPC will be running in the MPC's native BE mode.  Therefore, when performing Active Communications, access is performed through the BE region of the FPGA.

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Example 2b
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Stand Alone Operation - siserver (via a remote machine eg. siclient, siclientlib.dll, siclientlib.so, etc.)

During stand alone operation siserver is being run on the MPC processor.  Any application running on the MPC will be running in the MPC's native BE mode.  However, since the eventual byte order of the data will be little endian (for the remote machine) when performing Active Communications, access is performed through the LE region of the FPGA.

Care must be taken to remember when data is needed for the MPC and when data is needed for the remote machine.  DSP data required by the MPC should be fetched from the BE region of the FPGA.  DSP data required by the 'client' should be fetched from the LE region of the FPGA.  

For these situations there is a #define which can be safely added when the compiled code is or is not operating as the server.

From simpcdef.h:

#ifdef SERVER
#define SERVER_OFFSET				0x00100000
#else
#define SERVER_OFFSET				0x00000000
#endif

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